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DSD exam 5 November : Syllabus

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DSD exam 5 November : Syllabus Empty DSD exam 5 November : Syllabus

Post by BIT0122-Amit Wed Nov 04, 2009 11:22 pm

According to tabassum, the syllabus consists of:

Encoder
Decoder
MUX
Logic Gates
FPGA
PAL
PLA
PDL


and the chapter 4 presentation is available in the archive section.

Best of Luck for tomorrow.

Cool!
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Post by BIT0109-Jobaer Wed Nov 04, 2009 11:33 pm

What a syllabus..!!!
Ettoooooooooooooooooooo..................... [You must be registered and logged in to see this image.]
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Post by BIT0115-Efat Thu Nov 05, 2009 2:42 am

are bapar naa........... Razz Razz Razz
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